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외국계기업 | Application Engineer – MED

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포지션명	Application Engineer – MED
회사	외국계기업	직급	과장 ~ 차장
외국어		연령/성별	무관
진행절차	서류전형 -> 1차면접 -> 2차면접	마감일	채용시

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Working Title : Application Engineer – MED Job Qualifications More than 5 year experience related with register-transfer-level (RTL) digital logic design, functional verification methodology, Firmware, Linux kernel and android OS, driver level validation on FPGA test and ESL & emulation, FuSa related knowledge a plus. This experience should include some of the followings: Job Experience Requirement ● Verification of Full SoC and IP level : Verilog RTL simulation, Validation of SoC & IP on emulator and fpga. SoC and System level design and validation experiences a plus ● SOC work & verification with ARM Cores, protocols like AXI, ACE, APB … a plus ● Firmware, linux kernel, android OS, Driver level validation experience on fpga and emulator a plus for protocols such as USB, PCIe, MIPI, eMMC, UFS, CSI, DSI, eDP, Audio IP and multimedia& storage related IPs ● Sign-off Design Methodology, Power analysis and estimation & Process experience a plus ● Familiar with mobile AP, NPU, PMU, CMU, CPU architecture, modem, GPU, SSD controller, and large scale of digital IC a plus ● Familiar with Verilog, System Verilog, C++, SystemC, VIP integration and UVM Tool Experience ● Implementation and Verification in Emulator and FPGA : Veloce, Zebu, Palladium, Synplify-Pro, ISE of Xilinx, Trace32 ● Design and Simulation in RTL : Verilog-HDL, NC-verilog, Questa, Simvision, VCS ● Emulation experience a plus : Zebu, PXP, & Veloce ● Logic Synthesis : DC Complier, FPGA ● Power verification : Power Theater, Powerartiest, Powerpro, Spyglass, UPF flow verification General Requirements ● Communicate effectively in verbal and written form in English ● Build strong rapport and credibility with customer organizations while maintaining a company internal network of contacts ● With strong communications and interpersonal skills Desirable Qualifications: ● System Verilog, UVM, SVA ● SystemC, C/C++, Tcl/TK, PERL, Linux & Android bring up and debug ● Synthesis, SDC and static timing analysis as a plus Bachelor degree in EE and related field required. Strong written and oral communications in the English language is a plus. Job Duties 1. Providing technical support to customers via telephone and other electronic means, and at customer locations 2. Assisting customers in deploying Mentor Graphics' Emulation to solve design challenges 3. Tracking and updating customer issues usingdefined Mentor Graphics' processes and tracking tools 4. Developing and delivering technical training on new features and product updates 5. Developing technical content for Mentor's knowledge base 6. Communicating customers' technical requirementsas well as customer issues to the product and sales teams 7. Work collaboratively with team members to ensure mutual success [전형절차] 서류전형 / 면접전형 [제출서류] 국문이력서 자유양식 또는 당사 소정 양식 (필요시 영문이력서 제출 요구) [근무지] 판교

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Working Title : Application Engineer – MED

Job Qualifications

More than 5 year experience related with register-transfer-level (RTL) digital logic design, functional verification methodology, Firmware, Linux kernel and android OS, driver level validation on FPGA test and ESL & emulation, FuSa related knowledge a plus.

This experience should include some of the followings:

Job Experience Requirement

● Verification of Full SoC and IP level : Verilog RTL simulation, Validation of SoC & IP on emulator and fpga. SoC and System level design and validation experiences a plus

● SOC work & verification with ARM Cores, protocols like AXI, ACE, APB … a plus

● Firmware, linux kernel, android OS, Driver level validation experience on fpga and emulator a plus for protocols such as USB, PCIe, MIPI, eMMC, UFS, CSI, DSI, eDP, Audio IP and multimedia& storage related IPs

● Sign-off Design Methodology, Power analysis and estimation & Process experience a plus

● Familiar with mobile AP, NPU, PMU, CMU, CPU architecture, modem, GPU, SSD controller, and large scale of digital IC a plus

● Familiar with Verilog, System Verilog, C++, SystemC, VIP integration and UVM

Tool Experience

● Implementation and Verification in Emulator and FPGA : Veloce, Zebu, Palladium, Synplify-Pro, ISE of Xilinx, Trace32

● Design and Simulation in RTL : Verilog-HDL, NC-verilog, Questa, Simvision, VCS

● Emulation experience a plus : Zebu, PXP, & Veloce

● Logic Synthesis : DC Complier, FPGA

● Power verification : Power Theater, Powerartiest, Powerpro, Spyglass, UPF flow verification

General Requirements

● Communicate effectively in verbal and written form in English

● Build strong rapport and credibility with customer organizations while maintaining a company internal network of contacts

● With strong communications and interpersonal skills

Desirable Qualifications:

● System Verilog, UVM, SVA ● SystemC, C/C++, Tcl/TK, PERL, Linux & Android bring up and debug

● Synthesis, SDC and static timing analysis as a plus Bachelor degree in EE and related field required. Strong written and oral communications in the English language is a plus.

Job Duties

1. Providing technical support to customers via telephone and other electronic means, and at customer locations

2. Assisting customers in deploying Mentor Graphics' Emulation to solve design challenges

3. Tracking and updating customer issues usingdefined Mentor Graphics' processes and tracking tools

4. Developing and delivering technical training on new features and product updates

5. Developing technical content for Mentor's knowledge base

6. Communicating customers' technical requirementsas well as customer issues to the product and sales teams

7. Work collaboratively with team members to ensure mutual success

[전형절차]
서류전형 / 면접전형

[제출서류]
국문이력서 자유양식 또는 당사 소정 양식 (필요시 영문이력서 제출 요구)

[근무지] 판교

담당컨설턴트 정보
이름	김종욱 대표	이메일	jwkim2k@naver.com
전화		휴대폰	010-7145-1629

Application Engineer – MED > Order

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